## ELET1215 Course Outline

Course Outline:
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Lecture 1 - Latches, Registers and Counters
Lecture 2 - The bi-directional shift register
Lecture 3 - Synchronous and Asynchronous counters (comparison)
Lecture 4 - Mealy and Moore Finite State Machines and General Model of an Asynchronous Sequential Circuit
Lecture 5 - Transition table
Lecture 6 - Flow table
Lecture 7 - Stability
Lecture 8 - Races
Lecture 9 - Analysis of asynchronous circuits built with latches
Lecture 10 - Class Test
Lecture 11 - Reduction of states and primitive flow tables
Lecture 12 - Implication table
Lecture 13 - Merger diagram, covering and closure
Lecture 14 - Assigning outputs to unstable states
Lecture 15 - Race-free state assignment
Lecture 16 - Hazards
Lecture 17 - Memory structure, RAS and CAS, tri-state logic
Lecture 18 - Timing clocks, Word clocks, sequencers, jitter
Lecture 19 - Operational Amplifier basics
Lecture 20 - Class Test
Lecture 21 - Analog-to-Digital and Digital-to-Analog conversion, Sample and Hold, Quantization
Lecture 22 - The Binary Weighted DAC and the R/2R ladder, Zero-order hold
Lecture 23 - The Staircase ADC and the Flash converter, Aliasing
Lecture 24 - Class Test
Recommended text: Digital Design by M. Morris Mano (Prentice-Hall International publication)

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